Aspects of the present invention relate to prescaler circuits in a performance counter circuit, and more specifically, to dynamically configuring an event-count rate in a prescaler circuit for a performance counter circuit in a computer processing system.
Counters can be used to count signaled events for processes or events which are being monitored by a computer system. The signaled events can generate an event count in the counter that can keep track of the events for data logging, control, diagnostics and other functions in the system. Prescalers can be used in conjunction with counters to scale the events generated by the counters in order to reduce the occurrence of overflows from excess event counts in the counter.